D.5. Register Packet Format
The following g/G packets have previously been defined.
In the below, some thirty-two bit registers are transferred as
sixty-four bits. Those registers should be zero/sign extended (which?)
to fill the space allocated. Register bytes are transfered in target
byte order. The two nibbles within a register byte are transfered
most-significant - least-significant.
- MIPS32
All registers are transfered as thirty-two bit quantities in the order:
32 general-purpose; sr; lo; hi; bad; cause; pc; 32 floating-point
registers; fsr; fir; fp.
- MIPS64
All registers are transfered as sixty-four bit quantities (including
thirty-two bit registers such as sr). The ordering is the same
as MIPS32.
