A makefile may contain
macros (note that these are completely different
from C/C++ preprocessor macros). Macros allow convenient
string replacement. The makefiles in this book use a macro to invoke the
C++ compiler. For example,
The = is used to identify CPP
as a macro, and the $ and parentheses expand the macro. In this case,
the expansion means that the macro call $(CPP) will be replaced with the
string mycompiler. With the macro above, if you want to change to a
different compiler called cpp, you just change the macro
to:
You can also add compiler flags, etc., to
the macro, or use separate macros to add compiler flags.